Microprogrammed control

ACompressed recap

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Microprogrammed control: each step's control word stored in control memory; microroutine per instruction; shared fetch routine; µPC; opcode mapping to the start address; End returns to fetch. CM words = fetch + Σ execute steps; CM bits = words × width. Horizontal: one bit per signal (fast, wide). Vertical: field of k mutually exclusive signals = ⌈log₂(k+1)⌉ bits (⌈log₂ k⌉ if always one active). Sequencing: condition select ⌈log₂ #conditions⌉ bits; next address ⌈log₂ CM words⌉ bits; width = control + select + address. Nanoprogramming: N⌈log₂ D⌉ + DW. Hardwired is fast and rigid; microprogrammed is flexible and slower.

BMerged rule card

3.2.1 Microprogrammed control: control memory, control words, microroutines, µPC

• Control word = all signals of one step; microinstruction = stored control word (+ sequencing).
• Microroutine per instruction; fetch routine shared; µPC + starting-address generator; End → fetch.
• CM words = fetch + Σ execute steps; CM bits = words × width.
• Microprogrammed: flexible, slower, CISC-friendly.

3.2.2 Microinstruction formats: horizontal vs vertical, field encoding, control-memory size

• Horizontal: width = number of signals; fast; parallel; big CM.
• Vertical: field of k mutually exclusive signals = ⌈log₂(k+1)⌉ bits (⌈log₂ k⌉ if one is always active).
• Width = Σ fields (+ independent signals) (+ condition select + next address).
• CM bits = words × width.

3.2.3 Microprogram sequencing: next-address field, conditional branches; hardwired vs microprogrammed

• Next microinstruction: µPC + 1; branch to next-address field if condition true; opcode mapping; End → fetch.
• Width = control bits + ⌈log₂ #conditions⌉ + ⌈log₂ CM words⌉; CM words = 2^(next-address bits).
• Nanoprogramming: N·⌈log₂ D⌉ + D·W vs N·W.
• Hardwired: fast, rigid, RISC. Microprogrammed: flexible, slower, CISC.

CInterleaved GATE-style questions

Q1NAT2 marksCM bits

A CPU: fetch 3 microinstructions; 50 instructions with 4 execute microinstructions each; 70 instructions with 6 each. 32-bit microinstructions. Control memory bits?

Numerical answer: ________

Q2NAT1 markHorizontal

A datapath has 96 control signals. Horizontal control-field width?

Numerical answer: ________

Q3NAT2 marksVertical

Mutually exclusive groups of sizes 7, 7, 15 and 3 (idle allowed). Vertical width?

Numerical answer: ________

Q4NAT2 marksField widths

A 24-bit microinstruction has a 12-bit control field and selects one of 4 conditions. How many words can the control memory hold at most?

Numerical answer: ________

Q5MCQ1 markSpeed

Which microinstruction format is fastest for the same datapath?

• (A) All the same
• (B) Vertical
• (C) Horizontal
• (D) Extreme vertical

Q6NAT2 marksWidth

Control field 33 bits; MUX of 7 status bits; control memory of 300 words. Minimum width?

Numerical answer: ________

Q7MSQ2 marksFacts

Which are true?

• (A) The opcode is mapped to the start of its microroutine.
• (B) Each machine instruction has its own fetch microroutine.
• (C) The microprogram is stored in control memory.
• (D) The µPC normally increments after each microinstruction.

Q8NAT2 marksNano

N = 4,096 microinstructions, W = 100 bits, D = 128 distinct words. Bits saved by nanoprogramming?

Numerical answer: ________

DAnswer Vault