Memory as an array: address, word, byte vs word addressing, endianness, alignment

0 · Recall Warm-up

Answer from memory first. Answers are in the Answer Vault at the bottom.

• How many select lines does a 32-to-1 MUX need? from Lesson 0.2.3
• Arithmetic right shift of 1110 1100 by 2? from Lesson 0.2.2
• How many bits does it take to name one of 2²⁰ pages? from Lesson 0.2.1

1 · The Hook

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A 32-bit number like 0x12345678 occupies four bytes of memory. Which byte goes at the lowest address? Two answers exist, both used in real machines, and GATE asks which byte you read back. This lesson fixes how memory is addressed, what a "word" is, and why some addresses are faster than others.

2 · Predict First

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The 32-bit value 0x12345678 is stored at address 1000 on a machine that puts the least significant byte first. What byte is at address 1001?

Make a guess in your head. The answer opens Section 3.

3 · Core Concept

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Predict First — the answer

Least significant byte first (little-endian): 1000 → 0x78, 1001 → 0x56, 1002 → 0x34, 1003 → 0x12.

Memory as an array

Memory is a long array of locations, numbered 0, 1, 2, … by their addresses. The CPU puts an address on the address bus and reads or writes the location's contents on the data bus.

Word and addressable unit

• A word is the natural chunk of data the CPU handles at once, typically the width of its registers: 16, 32 or 64 bits.

• The addressable unit is what one address names.

• Byte-addressable (almost all modern machines): every byte has its own address. A 32-bit word occupies 4 consecutive addresses.

• Word-addressable: each address names a whole word.

Capacity = 2^(address bits) × (size of addressable unit).

• 24-bit addresses, byte-addressable: 2²⁴ B = 16 MB.
• 24-bit addresses, word-addressable with 32-bit words: 2²⁴ × 4 B = 64 MB.

On a byte-addressable machine with 4-byte words, the word number of a byte address is ⌊address / 4⌋.

Endianness

How the bytes of a multi-byte value are ordered:

• Big-endian: the most significant byte at the lowest address ("big end first").
• Little-endian: the least significant byte at the lowest address (x86, most ARM systems).

Endianness changes the order of bytes, never the order of bits inside a byte.

Alignment

A k-byte object is aligned if its address is a multiple of k. Memory delivers aligned words in one access; a misaligned 4-byte word at address 1002 spans words 1000–1003 and 1004–1007, so it needs two accesses. Compilers insert padding to keep data aligned.

Bus widths

• Address bus width = number of address bits → how many locations can be named.
• Data bus width = bits moved per transfer. A 64-bit data bus moves 8 bytes per access; reading a 32-byte block over it takes 4 transfers (used in Phase 4).

4 · Visual

Byte-addressable memory, 32-bit words (4 bytes each)

 word 0: | addr 0 | addr 1 | addr 2 | addr 3 |
 word 1: | addr 4 | addr 5 | addr 6 | addr 7 |
 word 2: | addr 8 | addr 9 | addr 10| addr 11|
            word number = floor(byte address / 4)

Misaligned 4-byte read at address 6: needs bytes 6,7 (word 1) and 8,9 (word 2) -> 2 accesses

5 · Worked Examples

Example 1 Easy

A byte-addressable machine with 32-bit words. Which word contains byte address 27, and which byte of that word is it?

Solution

⌊27/4⌋ = word 6; 27 − 24 = byte 3 within the word.

Example 2 Medium

A word-addressable memory has 20-bit addresses and 16-bit words. What is its capacity in bytes?

Solution

2²⁰ words × 2 B = 2²¹ B = 2 MB.

Example 3 GATE

The 32-bit value 0xCAFEBABE is stored big-endian at address 200. A program then reads the 16-bit value at address 202 as big-endian. What value does it get?

Solution

Addresses 200–203 hold CA FE BA BE. The 16-bit big-endian value at 202 is bytes BA, BE → 0xBABE.

6 · GATE Traps

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• Byte-addressable vs word-addressable changes capacity for the same address width.
• Little-endian puts the least significant byte at the lowest address.
• Endianness reorders bytes, not bits.
• A misaligned word costs two memory accesses.

7 · Memory Hook

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"Little end first = little-endian." The little (least significant) byte sits at the first (lowest) address.

8 · Connect the Dots

Chapter 0.2 is complete: bits and exponents, signed numbers, hardware parts, and memory as an addressed array. Phase 1 starts next: what an instruction looks like inside memory and how it names its operands.

9 · Self-Test

GATE format. Try every question before opening the vault.

Q1NAT1 markCapacity

A word-addressable memory has 16-bit addresses and 32-bit words. Capacity in KB?

Numerical answer: ________

Q2MCQ1 markEndianness

0x11223344 is stored little-endian at address 0. The byte at address 3 is:

• (A) 0x22
• (B) 0x11
• (C) 0x44
• (D) 0x33

Q3NAT1 markWord number

Byte-addressable, 8-byte words. Byte address 100 lies in which word number (starting from 0)?

Numerical answer: ________

Q4MSQ2 marksAlignment

On a machine with 4-byte words, which 4-byte accesses are aligned?

• (A) address 66
• (B) address 102
• (C) address 100
• (D) address 64

Q5NAT2 marksLittle-endian read

The 32-bit value 0x0A0B0C0D is stored little-endian at address 500. A 16-bit little-endian read at address 501 returns which value? Give it in decimal.

Numerical answer: ________

10 · Rule Card

• Capacity = 2^(address bits) × addressable unit.
• Byte-addressable: word number = ⌊address / word size⌋.
• Big-endian: MSB at lowest address. Little-endian: LSB at lowest address.
• k-byte object aligned ⇔ address multiple of k; misaligned word = 2 accesses.
• Data bus width = bytes per transfer.

11 · Concept Ledger

Unlocked in this lesson. From here on, these terms may be used.

memory locationwordaddressable unitbyte-addressableword-addressablecapacity formulabig-endianlittle-endianalignmentmisaligned accessaddress bus widthdata bus width

12 · Answer Vault