1.2.1 Immediate, register, direct, indirect and register-indirect modes

0 · Recall Warm-up

Answer from memory first. Answers are in the Answer Vault at the bottom.

16-bit words, 6-bit fields, 10 two-address instructions: max one-address? from Lesson 1.1.4
What is an immediate operand? from Lesson 1.1.1
What does CMP do to its operands? from Lesson 1.1.3

1 · The Hook

🎣

An operand field holds a number, say 300. Is that the value itself? The address where the value lives? The address of the address? Each answer is a different addressing mode, and each costs a different number of memory accesses. GATE gives a memory table and asks what gets loaded.

2 · Predict First

🤔

Memory holds M[300] = 400 and M[400] = 700. The instruction LOAD R0, @300 means "300 is the address of the address of the operand." What ends up in R0?

Make a guess in your head. The answer opens Section 3.

3 · Core Concept

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Predict First — the answer

M[300] = 400 is the operand's address; the operand is M[400] = 700.

Effective address

The effective address (EA) is the memory address where the operand finally sits. Addressing modes differ in how the EA (or the operand) is obtained from the operand field.

The memory and registers used in this chapter:

Address	Contents
200	500
300	400
400	700
500	600
600	900
700	800
800	300

Registers: R1 = 400, R2 = 200, R3 = 100.

The five basic modes

Mode	Written	Operand	Data memory accesses	`LOAD R0, …` gives
Immediate	`#300`	the field itself: 300	0	300
Register	`R1`	contents of the register	0	400
Direct (absolute)	`300`	M[300]; EA = 300	1	400
Indirect (memory indirect)	`@300`	M[M[300]]; EA = M[300]	2	700
Register indirect	`(R1)`	M[R1]; EA = R1	1	700

Immediate is fastest (no memory access) but the constant must fit in the field.
Direct reaches any address the field can name, but the field must be as wide as an address.
Indirect reaches a full-width address from a short field, at the cost of one extra memory access.
Register indirect gets the same effect cheaply: the register holds a full address (a pointer).

Also: implied (implicit) mode, where the operand is not named because the opcode implies it (the accumulator in ADD M, the stack top in ADD on a stack machine, the flags in "clear carry").

Counting memory references for an instruction

Total = instruction fetch (one access per instruction word) + operand accesses (from the table) + result store (1 if the result goes to memory). ADD R0, @300 in a one-word instruction: 1 + 2 = 3 accesses.

4 · Visual

Diagram: field 300 · EA: 400 · operand · LOAD R0, @300 · M[300] = 400 · M[400] = 700 · R0 = 700 · indirect: two data accesses · direct 300 would stop at M[300] = 400

Indirect addressing: the field gives the address of the address.

5 · Worked Examples

Example 1 Easy

Using the chapter table, what does LOAD R0, 500 (direct) load?

Solution

M[500] = 600.

Example 2 Medium

What does LOAD R0, @500 (indirect) load, and how many data memory accesses does it make?

Solution

EA = M[500] = 600; operand M[600] = 900; 2 accesses.

Example 3 GATE

A one-word instruction ADD @200, R1 adds R1 to the memory operand reached indirectly through 200 and writes the sum back to that same operand. How many memory accesses in total, and what value is written?

Solution

Fetch 1; EA = M[200] = 500 (1 access); read M[500] = 600 (1 access); write 600 + 400 = 1000 to M[500] (1 access). Total 4.

6 · GATE Traps

⚠️

Immediate ≠ direct: #300 is the number 300; 300 is M[300].
Indirect costs two data accesses (address, then operand); register indirect costs one.
Register mode makes no data memory access.
Don't forget the instruction fetch when a question says "total memory references".

7 · Memory Hook

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"# is the thing, plain is one hop, @ is two hops, (R) is one hop from a register."

8 · Connect the Dots

These five modes take the operand from one place. Next lesson adds an addition to the address: indexed, base and PC-relative modes, plus modes that step a register automatically.

9 · Self-Test

GATE format. Try every question before opening the vault.

Q1MCQ1 markIndirect

With the chapter table, LOAD R0, @200 loads:

(A) 600
(B) 900
(C) 200
(D) 500

Q2NAT1 markRegister indirect

With the chapter table (R2 = 200), what does LOAD R0, (R2) load?

Numerical answer: ________

Q3NAT1 markMemory references

How many memory accesses does the one-word instruction ADD R0, @X make in total (fetch included)? The result goes to R0.

Numerical answer: ________

Q4MSQ2 marksNo data access

Which modes obtain the operand without any data memory access?

(A) Register
(B) Direct
(C) Immediate
(D) Register indirect

Q5NAT2 marksChain

With the chapter table, what does LOAD R0, @700 load?

Numerical answer: ________

10 · Rule Card

EA = where the operand finally is.
Immediate #c: operand c (0 accesses). Register R: operand in R (0).
Direct A: EA = A (1). Indirect @A: EA = M[A] (2). Register indirect (R): EA = R (1).
Total references = fetch words + operand accesses + 1 if the result goes to memory.

11 · Concept Ledger

Unlocked in this lesson. From here on, these terms may be used.

addressing modeeffective address (EA)immediate moderegister modedirect (absolute) modeindirect moderegister indirect modepointerimplied modememory references per instruction

12 · Answer Vault

Answer Vault

Try the questions first. Open when you are ready to check.

Recall Warm-up

(16 − 10) × 64 = 384.
A constant stored inside the instruction itself.
Nothing; it only sets the flags.