Instruction types: data movement, ALU, shifts, compare and flags, branches and jumps

0 · Recall Warm-up

Answer from memory first. Answers are in the Answer Vault at the bottom.

• Stack code for (A + B) × (C − D)? from Lesson 1.1.2
• Which steps of the instruction cycle can reference memory? from Lesson 1.1.1
• When does signed overflow happen in an addition? from Lesson 0.2.2

1 · The Hook

🎣

if (x == y) in C has no single machine instruction. The machine compares (subtracts and remembers what happened in a few flag bits) and then branches on a flag. Flags are the glue between arithmetic and control flow, and they appear in every program-tracing question.

2 · Predict First

🤔

An 8-bit machine adds 0x80 and 0x80. Which of these come out as 1: "result is zero", "result is negative", "carry out", "signed overflow"?

Make a guess in your head. The answer opens Section 3.

3 · Core Concept

💡

Predict First — the answer

0x80 + 0x80 = 0x100: the 8-bit result is 0x00 with a carry out. Zero = 1, negative = 0, carry = 1, overflow = 1 (−128 + −128 = −256 does not fit).

Instruction types

Rotates

ROL (rotate left) moves every bit left and puts the old MSB into bit 0; ROR does the reverse. 1011 0001 ROL 1 → 0110 0011; ROR 1 → 1101 1000. Nothing is lost.

Flags (condition codes)

Most ALU operations update a status register (also called PSW, program status word, or flags register). Four standard flags:

• Z (zero) = 1 if the result is 0.
• N (negative, also S for sign) = the result's MSB.
• C (carry) = carry out of the MSB (unsigned overflow on addition).
• V (overflow) = signed overflow (Lesson 0.2.2).

CMP R1, R2 computes R1 − R2, sets the flags and throws the result away. TEST R1, R2 does R1 AND R2 the same way.

Branches

A conditional branch changes the PC only if its condition holds; otherwise execution falls through to the next instruction.

• BEQ / BZ: branch if Z = 1 (equal / zero). BNE / BNZ: branch if Z = 0.
• After CMP a, b (computing a − b): signed a < b ⇔ N ⊕ V = 1. Checking N alone is wrong when the subtraction overflows.
• JMP is unconditional.

Some machines skip flags and compare registers inside the branch: BNZ R3, LOOP branches if R3 ≠ 0. These notes use both styles; each question says which.

Loops and instruction counts

A loop that runs n times executes its body n times. Instruction count (IC) counts executed instructions:

MOV R1, #10        ; 1 instruction, once
LOOP: (3 instructions)   ; body
      DEC R1             ; R1 ← R1 − 1
      BNZ R1, LOOP       ; back while R1 ≠ 0

The body plus DEC and BNZ run 10 times: IC = 1 + 10 × 5 = 51.

4 · Visual

if (a < b) goto L      becomes      CMP  Ra, Rb       ; flags from a - b
                                    BLT  L            ; taken if N xor V = 1

5 · Worked Examples

Example 1 Easy

8-bit ROR of 0110 1001 by 1?

Solution

The old bit 0 (1) moves to the MSB: 1011 0100.

Example 2 Medium

8-bit: CMP R1, R2 with R1 = 0x30 (48) and R2 = 0x50 (80). Which of Z and N are set, and does BLT branch?

Solution

48 − 80 = −32 = 0xE0: Z = 0, N = 1, no overflow (V = 0). N ⊕ V = 1 → BLT is taken.

Example 3 GATE

How many instructions execute?

MOV R1, #6
LOOP: ADD R2, R2, R1
      SUB R1, R1, #2
      BNZ R1, LOOP
      HALT

Solution

R1 takes 6, 4, 2, 0: the body runs 3 times (it stops after R1 becomes 0). IC = 1 + 3 × 3 + 1 = 11.

6 · GATE Traps

⚠️

• CMP does not change its operands; only the flags.
• A loop that counts down by 2 from 6 runs 3 times, not 6. Trace the counter.
• Signed less-than is N ⊕ V, not N alone.
• Carry (C) and overflow (V) are different flags.

7 · Memory Hook

🧠

"Compare sets flags, branch reads flags." Z for equal, N ⊕ V for signed less-than.

8 · Connect the Dots

You know the menu of instructions and how flags link compares to branches. Next: how the opcode space is shared between instructions with different numbers of operands, the expanding-opcode trick GATE loves.

9 · Self-Test

GATE format. Try every question before opening the vault.

Q1MCQ1 markFlags

After an 8-bit ADD of 0x7F and 0x01, which flags are set?

• (A) Z and C
• (B) Z only
• (C) N and V
• (D) C and V

Q2NAT2 marksLoop count

How many instructions execute?

MOV R1, #20
LOOP: ADD R2, R2, #1
      SUB R1, R1, #5
      BNZ R1, LOOP
      HALT

Numerical answer: ________

Q3MCQ1 markRotate

8-bit ROL of 1001 0110 by 2 gives:

• (A) 1010 0101
• (B) 0010 0101
• (C) 0101 1000
• (D) 0101 1010

Q4MSQ2 marksCompare

Which statements are true for CMP R1, R2 followed by BEQ L?

• (A) CMP overwrites R1 with R1 − R2.
• (B) CMP computes R1 − R2 and discards the result.
• (C) If R1 = R2, the next instruction executed is at L.
• (D) The branch is taken when Z = 1.

Q5NAT1 markRotate value

An 8-bit register holds 0x81. What unsigned value does it hold after ROR by 1?

Numerical answer: ________

10 · Rule Card

• Types: data movement, arithmetic, logical, shift/rotate, compare/test, control transfer, I/O, NOP/HALT.
• Flags: Z (zero), N (MSB), C (carry out), V (signed overflow). CMP = subtract and keep only flags.
• BEQ: Z = 1; BNE: Z = 0; signed a < b after CMP a, b: N ⊕ V = 1.
• Rotate wraps bits; shift loses them.
• IC counts executed instructions: setup + iterations × body + exit.

11 · Concept Ledger

Unlocked in this lesson. From here on, these terms may be used.

data movement instructionsarithmetic and logical instructionsrotate (ROL/ROR)status register (PSW, flags)Z, N, C, V flagsCMP and TESTconditional branchunconditional jumpfall-throughloop instruction count

12 · Answer Vault