Machine instructions

ACompressed recap

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An instruction = opcode + operand fields (+ mode bits): opcode bits ⌈log₂ #ops⌉, register field ⌈log₂ #regs⌉, leftover bits = immediate. Cycle: IF, ID, OA, OF, EX, WB/SR, then interrupt check. Machines by operand count: 3, 2 (overwrites), 1 (accumulator), 0 (stack: pop b, pop a, push a OP b; use postfix); load/store machines touch memory only with LOAD/STORE. Instruction types and flags Z N C V; CMP sets flags only; signed less-than = N ⊕ V. Expanding opcodes: 2ʷ encodings; each instruction uses 2^(operand bits); carve from most operand bits to fewest.

BMerged rule card

1.1.1 Instruction = opcode + operands; instruction formats; the instruction cycle

• Instruction = opcode + operand fields (+ mode bits). Opcode bits = ⌈log₂ #ops⌉; register field = ⌈log₂ #regs⌉.
• Immediate = leftover bits: unsigned max 2ⁿ−1; signed −2ⁿ⁻¹ … 2ⁿ⁻¹−1.
• Instruction k (from 0) of fixed length L at start S: S + k·L.
• Cycle: IF → ID → OA → OF → EX → WB/SR → interrupt check. IF always references memory.
• Notation: destination first; M[X] = contents of location X; #c = constant.

1.1.2 3-, 2-, 1- and 0-address machines: register, accumulator and stack code

• 3-address: dest ← src1 OP src2. 2-address: dest ← dest OP src. 1-address: AC ← AC OP M. 0-address: stack.
• Stack op: pop b, pop a, push a OP b. Translate via postfix.
• Load/store: only LOAD/STORE touch memory; arithmetic on registers.
• Fewer addresses → shorter instructions, more of them.

1.1.3 Instruction types: data movement, ALU, shifts, compare and flags, branches and jumps

• Types: data movement, arithmetic, logical, shift/rotate, compare/test, control transfer, I/O, NOP/HALT.
• Flags: Z (zero), N (MSB), C (carry out), V (signed overflow). CMP = subtract and keep only flags.
• BEQ: Z = 1; BNE: Z = 0; signed a < b after CMP a, b: N ⊕ V = 1.
• Rotate wraps bits; shift loses them.
• IC counts executed instructions: setup + iterations × body + exit.

1.1.4 Instruction encoding: opcode space, register fields, expanding opcodes

• Fixed k-bit opcode: ≤ 2ᵏ instructions.
• Expanding: total encodings 2ʷ; a class with f operand bits uses count × 2ᶠ.
• Next class max = (2ʷ − Σ count·2ᶠ) ÷ 2^(f_next). Carve from most operand bits to fewest.
• Classic 16-bit / 4-bit fields: 15 + 15 + 15 + 16 = 61 instructions.

CInterleaved GATE-style questions

Q1NAT1 markImmediate width

A 32-bit instruction has a 6-bit opcode, three register fields for 32 registers and an immediate in the rest. Immediate width in bits?

Numerical answer: ________

Q2NAT2 marksStack code

A stack machine evaluates A × (B + C) − D with A = 4, B = 2, C = 5, D = 10 using postfix code. What value is finally on top?

Numerical answer: ________

Q3NAT2 marksExpanding opcode

12-bit instructions with 3-bit register fields. Three-register instructions use a 3-bit opcode; there are 6 of them. Two-register instructions come next: 10 of them. What is the maximum number of one-register instructions?

Numerical answer: ________

Q4MCQ1 markAccumulator

Which instruction set needs a temporary memory location to compute (A + B) × (C − D) without extra registers?

• (A) Three-address
• (B) One-address (accumulator)
• (C) Zero-address (stack)
• (D) Load/store with 3 registers

Q5NAT1 markLoop instruction count

How many instructions execute? MOV R1, #12 then LOOP: SUB R1, R1, #3 and BNZ R1, LOOP, then HALT.

Numerical answer: ________

Q6MSQ2 marksFlags

An 8-bit ADD computes 0xFF + 0x01. Which flags are 1?

• (A) C
• (B) Z
• (C) N
• (D) V

Q7NAT2 marksEncodings

16-bit instructions, 5-bit register fields. Type A: 1 instruction with three register fields. Type B: 25 instructions with two register fields. Type C: instructions with one register field. Maximum number of type-C instructions?

Numerical answer: ________

Q8NAT1 markMemory references

A one-word instruction reads one operand from memory and writes its result to memory. How many memory references does it make, including the fetch?

Numerical answer: ________

DAnswer Vault