Hardwired control

ACompressed recap

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The control unit outputs every control signal in every step, from the opcode (IR), the step counter (T1…Tn, one-hot), the flags and MFC/interrupts. End resets the counter to T1; WMFC freezes it until MFC. Steps per instruction vary; time = (steps + waits) × period. Signal count ≈ Rin/Rout per register + memory + ALU + MUX + sequencing. Hardwired control: opcode decoder (k → 2ᵏ), step decoder, AND–OR network: each signal = OR of (step AND instruction [AND flag]); fetch terms have no instruction factor. Fast, inflexible, used in RISC.

BMerged rule card

3.1.1 Control signals, control steps and the step counter: what a control unit must produce

• Control unit inputs: IR opcode, step counter (T1…Tn), flags, MFC/interrupts. Output: all control signals per step.
• Step counter: ⌈log₂ max steps⌉ bits, decoded one-hot; End resets; WMFC freezes.
• Instruction time = (steps + waits) × clock period.
• Control signals ≈ 2 per register (in/out) + memory + ALU + MUX + sequencing.

3.1.2 Hardwired control: decoder, step counter and signal equations

• Hardwired = instruction decoder + step decoder + AND–OR network (+ flags).
• Signal = Σ (Tⱼ · INSᵢ [· flag]); fetch steps carry no instruction factor.
• Counter enable = NOT(WMFC) + MFC.
• Fast, inflexible, RISC-style.

CInterleaved GATE-style questions

Q1NAT1 markCounter

Maximum 25 steps per instruction. Step-counter bits?

Numerical answer: ________

Q2NAT2 marksTime

At 250 MHz, an instruction takes 9 steps plus 4 cycles of memory waiting. Time in ns?

Numerical answer: ________

Q3NAT2 marksSignals

A single-bus CPU has 8 GPRs with Rin/Rout, and PC, MDR, IR, Y, Z with the same 9 signals as in Lesson 3.1.1, MARin, Read, Write, WMFC, 6 ALU-function lines, Select4, SelectY and End. Total control signals?

Numerical answer: ________

Q4MCQ1 markEnd

When End is asserted:

• (A) the PC is cleared
• (B) memory stops responding
• (C) the step counter resets so the next instruction's fetch begins
• (D) the processor halts

Q5MCQ1 markEquation

With the lesson's instructions, End equals:

• (A) T3
• (B) T6·ADDreg + T7·ADDmem + T5·BR
• (C) T5·ADDreg + T6·ADDmem + T4·BR
• (D) T7

Q6NAT1 markDecoders

An 8-bit opcode is fully decoded. How many instruction lines?

Numerical answer: ________

Q7MSQ2 marksHardwired vs needs

A hardwired control unit needs which of these?

• (A) The opcode
• (B) Condition flags for conditional instructions
• (C) A control memory
• (D) The step number

Q8NAT2 marksProduct terms

Signal Zout is active in T2 (all instructions), in T6 of 10 instructions and in T5 of 4 instructions. Number of product terms?

Numerical answer: ________

DAnswer Vault