0 · Recall Warm-up
Answer from memory first. Answers are in the Answer Vault at the bottom.
- With the chapter table, what does
LOAD R0, @300load? from Lesson 1.2.1 - How many encodings does an instruction with 8 operand bits use? from Lesson 1.1.4
- What is the two's-complement range of an 8-bit field? from Lesson 0.2.2
1 · The Hook
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A[i] in C: the array starts at a fixed address, and i changes in a loop. Neither direct nor register-indirect mode fits alone. Displacement modes add a register to a constant in the instruction, and that one addition covers arrays, structure fields, local variables and branches.
2 · Predict First
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R1 = 400. The instruction is LOAD R0, 100(R1), meaning EA = 100 + R1. Using the chapter table, what is loaded?
Make a guess in your head. The answer opens Section 3.
3 · Core Concept
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Predict First — the answer
EA = 100 + 400 = 500; M[500] = 600.
Displacement: EA = constant + register
Written d(R) or A(R): EA = (field value) + (register contents), one data access. Three names for the same arithmetic, by who holds what:
- Indexed: the instruction holds an array's start address A; the index register holds the offset of the element.
LOAD R0, 1000(R2)with R2 = 4i reads A[i] of 4-byte elements at address 1000 + 4i. - Base (base-register): the register holds a starting address (the base: of a record, a block of variables, or a program loaded somewhere); the instruction holds a small displacement. Programs can be moved in memory by changing only the base register.
- Base-indexed: EA = base register + index register (+ displacement).
Some machines also scale the index: EA = A + R × s, with s = element size.
PC-relative
EA = PC + offset, where PC is the address of the next instruction (it was advanced during the fetch, Lesson 1.1.1). The offset is a two's-complement number, so branches can go backwards. Used for branches and for data placed near the code.
To branch from an instruction at address X of length L to target T: offset = T − (X + L).
Code using only PC-relative branches works wherever it is loaded: it is position-independent (relocatable).
On word-addressed machines, or when the offset counts instructions, multiply: target = PC + offset × (instruction size). The question will say.
Auto-increment and auto-decrement
- Auto-increment
(R)+: EA = R; after the access, R ← R + d, where d is the operand size in bytes. - Auto-decrement
−(R): first R ← R − d; then EA = R.
They walk through arrays without separate add instructions, and they implement a stack: push with auto-decrement, pop with auto-increment (Lesson 1.3.2).
Worked with the chapter table (R1 = 400, R2 = 200, R3 = 100; 4-byte operands)
| Instruction | EA | R0 gets | Register change |
|---|---|---|---|
LOAD R0, 100(R1) | 500 | 600 | none |
LOAD R0, 300(R3) | 400 | 700 | none |
LOAD R0, (R1)+ | 400 | 700 | R1 → 404 |
LOAD R0, −(R2) | 196 | M[196] | R2 → 196 first |
4 · Visual
Indexed: EA = 1000 + R2 A[i] with R2 = 4*i
^ in instruction ^ changes each iteration
PC-relative: instruction at 2000, 4 bytes long, offset -24
PC (already advanced) = 2004 -> EA = 2004 - 24 = 1980
Auto-increment (R1)+ : use M[R1], then R1 = R1 + 4
Auto-decrement -(R1) : R1 = R1 - 4, then use M[R1]
5 · Worked Examples
Example 1 Easy
A 4-byte branch instruction at address 3000 has PC-relative offset +60. Where does it go?
Solution
PC = 3004; target 3064.
Example 2 Medium
A word-addressable machine. A two-word branch instruction is stored at address 750 and must jump to address 500. What value goes in its relative-address field?
Solution
PC after the fetch = 752; offset = 500 − 752 = −252.
Example 3 GATE
R1 = 400 (chapter table). LOAD R0, (R1)+ then LOAD R5, (R1)+ with 100-byte operands (so d = 100). Final R0, R5 and R1?
Solution
First: EA 400 → R0 = 700, R1 → 500. Second: EA 500 → R5 = 600, R1 → 600.
6 · GATE Traps
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- PC-relative uses the updated PC (next instruction's address), not the branch's own address.
- Auto-increment changes the register after use; auto-decrement before.
- The step d is the operand size, not always 1.
- Indexed and base use the same addition; the difference is which part is the large address.
7 · Memory Hook
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"Displacement = field + register. PC-relative = next PC + offset. Plus after, minus before."
8 · Connect the Dots
Lesson 1.2.1 fetched operands from one place; this lesson added an addition (indexed, base, PC-relative) and automatic stepping. Next: matching each mode to the program construct it serves, and counting memory references for mixed instruction sequences.
9 · Self-Test
GATE format. Try every question before opening the vault.
Q1NAT1 markIndexed
With the chapter table (R3 = 100), what does LOAD R0, 200(R3) load?
Numerical answer: ________
Q2NAT2 marksPC-relative offset
A 4-byte branch instruction at byte address 2000 must jump to 1960. What signed offset goes in the instruction (PC-relative, byte offset)?
Numerical answer: ________
Q3MCQ1 markAuto-increment
R2 = 200 (chapter table), 4-byte operands. After LOAD R0, (R2)+:
- (A) R0 = 500, R2 = 204
- (B) R0 = 200, R2 = 204
- (C) R0 = 500, R2 = 200
- (D) R0 = M[204], R2 = 204
Q4NAT1 markAuto-decrement
R1 = 400. Three instructions in a row each use −(R1) with 4-byte operands. What is R1 afterwards?
Numerical answer: ________
Q5MSQ2 marksDisplacement modes
Which statements are true?
- (A) Indexed and base addressing compute EA by the same addition.
- (B) PC-relative branches allow code to run at any load address.
- (C) In auto-decrement, the register is decremented after the access.
- (D) PC-relative addressing adds the offset to the address of the next instruction.
10 · Rule Card
- Displacement d(R): EA = d + R. Indexed: big address in instruction, index in register. Base: address in register, small displacement.
- PC-relative: EA = (address of next instruction) + offset; offset = T − (X + L).
- (R)+: use M[R], then R += d. −(R): R −= d, then use M[R]. d = operand size.
- Position-independent code: PC-relative branches.
11 · Concept Ledger
Unlocked in this lesson. From here on, these terms may be used.
displacement mode d(R)indexed modeindex registerbase-register modebase-indexed modescaled indexPC-relative modebranch offset T − (X + L)position-independent (relocatable) codeauto-increment (R)+auto-decrement −(R)
12 · Answer Vault
Answer Vault
Try the questions first. Open when you are ready to check.
Recall Warm-up
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- 2⁸ = 256.
- −128 to 127.
Self-Test
Q1 Answer: 4001 mark
EA = 200 + 100 = 300; M[300] = 400.
Re-read: Lesson 1.2.2 — Displacement modes: indexed, base, PC-relative; auto-increment and auto-decrement
Q2 Answer: -442 marks
PC = 2004; 1960 − 2004 = −44.
Re-read: Lesson 1.2.2 — Displacement modes: indexed, base, PC-relative; auto-increment and auto-decrement
Q3 Answer: (A)1 mark
Use M[200] = 500, then R2 ← 204.
- (B) is wrong: The operand is M[R2], not R2.
- (C) is wrong: The register is incremented.
- (D) is wrong: The increment happens after the access.
Re-read: Lesson 1.2.2 — Displacement modes: indexed, base, PC-relative; auto-increment and auto-decrement
Q4 Answer: 3881 mark
400 − 3 × 4 = 388.
Re-read: Lesson 1.2.2 — Displacement modes: indexed, base, PC-relative; auto-increment and auto-decrement
Q5 Answer: (A) (B) (D)2 marks
C is false: auto-decrement updates the register first.
- (C) is wrong: That is backwards; it decrements first.
Re-read: Lesson 1.2.2 — Displacement modes: indexed, base, PC-relative; auto-increment and auto-decrement