0 · Recall Warm-up
Answer from memory first. Answers are in the Answer Vault at the bottom.
- What does the program counter hold? from Lesson 0.1.1
- Which bus is one-way? from Lesson 0.1.1
- What makes a Harvard machine different from a von Neumann machine? from Lesson 0.1.1
1 · The Hook
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Two processors run the same program. One has a 3 GHz clock, the other 2 GHz. The 2 GHz chip finishes first. How? Clock speed is only one of three numbers that decide speed. This lesson gives the formula that every GATE performance question (cache, pipeline, I/O) reduces to.
2 · Predict First
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A program executes 2 × 10⁹ instructions. Processor X runs at 3 GHz and needs on average 3 clock cycles per instruction. Processor Y runs at 2 GHz and needs 1.5 cycles per instruction. Which finishes first, and how long does each take?
Make a guess in your head. The answer opens Section 3.
3 · Core Concept
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Predict First — the answer
X: 2×10⁹ × 3 / (3×10⁹) = 2 s. Y: 2×10⁹ × 1.5 / (2×10⁹) = 1.5 s. Y wins even with the slower clock, because it needs fewer cycles per instruction.
The clock
Every step inside the CPU is timed by a clock: a signal that ticks at a fixed rate.
- Clock rate (frequency) f: ticks per second, in Hz. 1 GHz = 10⁹ Hz.
- Clock cycle time (period) T = 1 / f. 2 GHz → T = 0.5 ns. 500 MHz → T = 2 ns.
CPI
Different instructions need different numbers of cycles. CPI (cycles per instruction) is the average number of cycles per instruction for a program.
With an instruction mix, CPI is a weighted average:
CPI = Σ (fraction of instructions of class i) × (cycles for class i)
Example: 50% ALU (1 cycle), 30% load/store (3 cycles), 20% branch (2 cycles) → CPI = 0.5×1 + 0.3×3 + 0.2×2 = 1.8.
The performance equation
CPU time = IC × CPI × T = IC × CPI / f
where IC is the instruction count (instructions actually executed, not lines of code). Every design trick in this course lowers one of the three factors:
- better instructions (Phase 1) change IC and CPI,
- a faster datapath or deeper pipeline (Phases 2, 5) changes T and CPI,
- caches (Phase 4) cut the cycles lost waiting for memory, which lowers CPI.
MIPS
MIPS (million instructions per second) = f / (CPI × 10⁶). A 2 GHz CPU with CPI 1.6 runs at 2×10⁹ / 1.6 / 10⁶ = 1,250 MIPS. MIPS ignores IC, so a machine with a higher MIPS rating can still be slower if it needs more instructions for the same job.
Speedup and Amdahl's law
Performance = 1 / execution time. Speedup of B over A = time(A) / time(B).
If an improvement speeds up only a fraction F of the original execution time by a factor S, the rest is untouched:
New time = Old time × [(1 − F) + F / S] → Overall speedup = 1 / [(1 − F) + F / S]
This is Amdahl's law. Even with S → ∞ the speedup cannot exceed 1 / (1 − F): the part you did not improve sets the limit.
Example: 40% of the time is floating-point work; a new unit makes it 10× faster. Speedup = 1 / (0.6 + 0.04) = 1 / 0.64 = 1.5625. Limit with an infinitely fast unit: 1 / 0.6 ≈ 1.67.
4 · Visual
CPU time = IC x CPI x T
(how many (cycles each, (seconds per cycle
instructions) on average) = 1/f)
Amdahl: old time |------ 1-F ------|--- F ---|
new time |------ 1-F ------|-F/S-| speedup = 1 / ((1-F) + F/S)
| Clock rate | Cycle time |
|---|---|
| 100 MHz | 10 ns |
| 500 MHz | 2 ns |
| 1 GHz | 1 ns |
| 2 GHz | 0.5 ns |
| 4 GHz | 0.25 ns |
5 · Worked Examples
Example 1 Easy
A 2.5 GHz processor. What is its cycle time?
Solution
T = 1 / (2.5×10⁹) s = 0.4 ns.
Example 2 Medium
Instruction mix: 40% ALU (1 cycle), 40% memory (4 cycles), 20% branch (2 cycles). Clock 1 GHz, IC = 5×10⁸. Find CPI and CPU time.
Solution
CPI = 0.4×1 + 0.4×4 + 0.2×2 = 0.4 + 1.6 + 0.4 = 2.4. Time = 5×10⁸ × 2.4 / 10⁹ = 1.2 s.
Example 3 GATE
A program spends 60% of its time in a part that is made 3 times faster. What is the overall speedup (2 decimals)?
Solution
1 / (0.4 + 0.6/3) = 1 / (0.4 + 0.2) = 1 / 0.6 = 1.67.
6 · GATE Traps
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- IC counts executed instructions: a loop body that runs 100 times counts 100 times.
- Cycle time is the reciprocal of frequency: doubling f halves T.
- Amdahl's F is a fraction of the original time, not of the instructions, unless the question says they are the same.
- MIPS can mislead: compare CPU time, never MIPS alone, when instruction counts differ.
- Speedup = old time / new time (bigger than 1 means faster).
7 · Memory Hook
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"Count × Cycles × Clock." CPU time = IC × CPI × T. And for Amdahl: "you can't speed up what you don't touch."
8 · Connect the Dots
Lesson 0.1.1 gave the loop; this lesson measured it: CPU time = IC × CPI × T. Next chapter builds the bit toolkit (binary, powers of two, signed numbers, gates, memory as an array) that every later calculation uses.
9 · Self-Test
GATE format. Try every question before opening the vault.
Q1NAT1 markCPU time
A program executes 4 × 10⁹ instructions with CPI 1.25 on a 2 GHz processor. CPU time in seconds?
Numerical answer: ________
Q2NAT2 marksCPI from mix
Instruction mix: 50% ALU (1 cycle), 20% load (5 cycles), 10% store (4 cycles), 20% branch (3 cycles). What is the CPI?
Numerical answer: ________
Q3NAT1 markMIPS
A 1.5 GHz processor has CPI 2. What is its MIPS rating?
Numerical answer: ________
Q4NAT2 marksAmdahl
An enhancement makes 80% of a program's execution time run 4 times faster. Overall speedup (2 decimals)?
Numerical answer: ________
Q5MCQ2 marksComparing machines
Machine A: 4 GHz, CPI 2.0, runs 10⁹ instructions for a program. Machine B: 3 GHz, CPI 1.2, needs 1.2 × 10⁹ instructions for the same program. Which is true?
- (A) A is faster by a factor of 1.0
- (B) A is faster by a factor 1.2
- (C) B is faster by a factor 1.04
- (D) B is faster by a factor 1.25
10 · Rule Card
- T = 1/f. CPU time = IC × CPI × T = IC × CPI / f.
- CPI of a mix = Σ fraction × cycles.
- MIPS = f / (CPI × 10⁶); compare machines by CPU time, not MIPS.
- Speedup = old time / new time. Amdahl: 1 / ((1−F) + F/S); upper limit 1/(1−F).
11 · Concept Ledger
Unlocked in this lesson. From here on, these terms may be used.
clock rate (frequency)clock cycle timeCPIinstruction mixinstruction count (IC)CPU time = IC × CPI × TMIPSspeedupAmdahl's law
12 · Answer Vault
Answer Vault
Try the questions first. Open when you are ready to check.
Recall Warm-up
- The address of the next instruction to fetch.
- The address bus (CPU → memory/I/O).
- Separate memories (and paths) for instructions and data.
Self-Test
Q1 Answer: 2.51 mark
4×10⁹ × 1.25 / 2×10⁹ = 2.5 s.
Re-read: Lesson 0.1.2 — Performance: clock, cycle time, CPI, execution time, MIPS, speedup, Amdahl's law
Q2 Answer: 2.52 marks
0.5 + 1.0 + 0.4 + 0.6 = 2.5.
Re-read: Lesson 0.1.2 — Performance: clock, cycle time, CPI, execution time, MIPS, speedup, Amdahl's law
Q3 Answer: 7501 mark
1.5×10⁹ / 2 / 10⁶ = 750.
Re-read: Lesson 0.1.2 — Performance: clock, cycle time, CPI, execution time, MIPS, speedup, Amdahl's law
Q4 Answer: 2.49 to 2.512 marks
1 / (0.2 + 0.8/4) = 1 / 0.4 = 2.5.
Re-read: Lesson 0.1.2 — Performance: clock, cycle time, CPI, execution time, MIPS, speedup, Amdahl's law
Q5 Answer: (C)2 marks
A: 10⁹ × 2 / 4×10⁹ = 0.5 s. B: 1.2×10⁹ × 1.2 / 3×10⁹ = 0.48 s. B is faster: 0.5 / 0.48 ≈ 1.04.
- (A) is wrong: The times differ (0.5 s vs 0.48 s).
- (B) is wrong: A is slower, not faster.
- (D) is wrong: 0.5/0.48 is about 1.04, not 1.25.
Re-read: Lesson 0.1.2 — Performance: clock, cycle time, CPI, execution time, MIPS, speedup, Amdahl's law