0.1.1 What a computer is: CPU, memory, I/O, buses; the stored-program idea; fetch–decode–execute

1 · The Hook

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Your phone, a laptop and the computer that will run your GATE exam all do one thing, billions of times a second: fetch an instruction from memory, carry it out, move to the next one. Every topic in this subject, from addressing modes to caches to pipelines, is a way of doing that one loop faster or more cleverly. This lesson draws the machine that runs the loop.

2 · Predict First

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A program and the numbers it works on sit in the same memory, both as plain patterns of 0s and 1s. The word stored at address 100 is 0001 0010 0000 0011. Is it an instruction or a number? How does the processor decide?

Make a guess in your head. The answer opens Section 3.

3 · Core Concept

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Predict First — the answer

The bits alone cannot tell. The processor treats a word as an instruction when it fetches it from the address held in its program counter, and as data when an instruction names it as an operand. The same 16 bits could be "add R2 to R3" or the number 4,611.

The five classic units

A computer has five functional parts:

Input units bring data in (keyboard, network card, disk).
Output units send results out (display, printer, disk).
Memory holds programs and data as numbered locations; the number of a location is its address.
The ALU (arithmetic logic unit) does arithmetic (add, subtract) and logic (AND, OR, compare).
The control unit reads instructions and tells every other part what to do, step by step.

The ALU, the control unit and a handful of small, very fast storage cells called registers together form the CPU (central processing unit, the processor). Input and output units together are I/O.

The stored-program idea (von Neumann architecture)

Early machines were programmed by rewiring. The stored-program concept puts the program itself in memory, next to its data, as numbers. Consequences:

Changing the program means writing new numbers into memory, not rewiring.
Instructions run one after another in address order, unless an instruction says to jump.
A special register, the program counter (PC), holds the address of the next instruction to fetch.

A machine with one memory (and one path to it) for both instructions and data is a von Neumann machine. A Harvard machine has separate instruction and data memories, each with its own path, so it can fetch an instruction and read data in the same cycle. Because everything in a von Neumann machine flows through one path to memory, that path limits speed: the von Neumann bottleneck. Caches (Phase 4) are the main cure.

Buses

The units talk over shared bundles of wires called buses. The system bus has three parts:

Bus	Carries	Direction
Address bus	which location (or device) is wanted	CPU → memory / I/O (one way)
Data bus	the value being read or written	both ways
Control bus	commands and status: read, write, clock, interrupt request	mixed

The instruction cycle (first look)

The CPU repeats this loop forever:

Fetch: read the instruction at address PC from memory.
Advance: PC ← PC + (length of the instruction), so PC points at the next one.
Decode: the control unit works out what the instruction asks for.
Fetch operands: read any data the instruction needs (from registers or memory).
Execute: the ALU (or another unit) does the work.
Store result: write the answer to a register or memory.

Phase 1 adds detail to every step; Phase 2 shows the wires; Phase 3 shows who flips the switches.

4 · Visual

Diagram: CPU: control unit + ALU + registers (PC ...) · Memory: instructions + data · Input · Output · System bus: address · data · control

Von Neumann machine: one memory for program and data, one bus connecting everything.

The loop the CPU runs forever

   +--> FETCH (instruction at PC) --> PC = PC + length --> DECODE
   |                                                         |
   +---- STORE RESULT <---- EXECUTE <---- FETCH OPERANDS <---+

5 · Worked Examples

Example 1 Easy

Which bus is one-way, and in which direction?

Solution

The address bus: from the CPU to memory and I/O. The CPU decides which location it wants; memory never chooses an address. The data bus is two-way (reads bring data in, writes send it out).

Example 2 Medium

An instruction "add the number stored at memory address 2000 to register R1" occupies one memory word. How many times does the CPU access memory to complete it?

Solution

2: one access to fetch the instruction itself, one to read the operand at address 2000. The result goes to a register, so there is no write to memory.

Example 3 GATE

Why can a Harvard machine fetch the next instruction while the current instruction reads its data, but a von Neumann machine cannot (without extra help)?

Solution

Harvard has separate memories and paths for instructions and data, so both accesses happen at once. A von Neumann machine has one memory path, so the two accesses must take turns. (Pipelines in Phase 5 meet this as a structural hazard.)

6 · GATE Traps

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The PC holds the address of the next instruction, not the one being executed (it is advanced right after the fetch).
"Stored program" means the program is in memory as data, not in read-only hardware.
The address bus is one-way; the data bus is two-way.
Whether a word is an instruction or data depends on how it is used, not on its bits.

7 · Memory Hook

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"PC points ahead." As soon as an instruction arrives, the PC is already pointing at the one after it.

8 · Connect the Dots

This lesson gave the machine and its loop. Next lesson asks how fast the loop runs: clock cycles, cycles per instruction and the one formula that measures every design in this course.

9 · Self-Test

GATE format. Try every question before opening the vault.

Q1MCQ1 markStored-program concept

Which statement describes the stored-program (von Neumann) concept?

(A) Instructions are executed in random order
(B) Data is stored in registers only
(C) Programs are hard-wired into the control unit
(D) Programs and data are stored in the same memory

Q2MCQ1 markBuses

Which bus is unidirectional in a typical system bus?

(A) All three
(B) Data bus
(C) Control bus
(D) Address bus

Q3NAT1 markMemory accesses

An instruction occupies 2 memory words. It reads one operand from memory and writes its result to memory. The memory delivers one word per access. How many memory accesses does it need in total?

Numerical answer: ________

Q4MSQ2 marksHarvard vs von Neumann

Which statements are true?

(A) A Harvard machine has separate instruction and data memories.
(B) A von Neumann machine can fetch an instruction and read data in the same memory cycle without extra hardware.
(C) The von Neumann bottleneck is the single path between CPU and memory.
(D) The program counter holds the address of the next instruction to fetch.

Q5MCQ1 markInstruction cycle

In the instruction cycle, when is the PC normally advanced?

(A) Only when a jump instruction runs
(B) Before the instruction is fetched
(C) Right after the instruction is fetched
(D) After the result is stored

10 · Rule Card

Five units: input, output, memory, ALU, control. CPU = ALU + control + registers.
Stored program: instructions and data in one memory; PC = address of the next instruction.
Von Neumann: one memory path (bottleneck). Harvard: separate instruction and data memories.
Address bus one-way (CPU → memory); data bus two-way; control bus carries commands and status.
Instruction cycle: fetch → PC advance → decode → operand fetch → execute → store.

11 · Concept Ledger

Unlocked in this lesson. From here on, these terms may be used.

CPUALUcontrol unitregistermemory location and addressI/Ostored-program conceptprogram counter (PC)von Neumann architectureHarvard architecturevon Neumann bottleneckaddress busdata buscontrol businstruction cycle

12 · Answer Vault

Answer Vault

Try the questions first. Open when you are ready to check.