I/O devices, interfaces and ports; memory-mapped vs I/O-mapped I/O; buses

0 · Recall Warm-up

Answer from memory first. Answers are in the Answer Vault at the bottom.

• Time per instruction for CPI 1.68 at 1.6 GHz? from Lesson 5.3.2
• What does a k-to-2ᵏ decoder do in memory interfacing? from Lesson 4.1.4
• Which bus is one-way? from Lesson 0.1.1

1 · The Hook

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A keyboard produces a few bytes a second; an SSD moves gigabytes. Both must plug into the same CPU, whose instructions only know registers and memory addresses. The bridge is an I/O interface with a few registers the CPU can read and write. How those registers get addresses is the first design choice, and a regular GATE one-liner.

2 · Predict First

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A machine has a 16-bit address bus. The designers reserve the top 4 KB of addresses for device registers, which programs access with ordinary LOAD and STORE instructions. How much memory can the machine still address?

Make a guess in your head. The answer opens Section 3.

3 · Core Concept

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Predict First — the answer

2¹⁶ = 64 KB in total; 64 − 4 = 60 KB remain for memory. This is memory-mapped I/O.

The I/O interface (controller)

Between the system bus and each device sits an interface that converts between bus transfers and the device's own signals. It exposes a few registers, called I/O ports:

• Data register (buffer): the byte or word being transferred.
• Status register: flags such as READY/BUSY, ERROR.
• Control (command) register: what the device should do (start, read, write, mode).

The CPU talks to a device only by reading and writing these ports.

Memory-mapped I/O

Ports get addresses inside the memory address space.

• Ordinary LOAD/STORE (and every addressing mode) work on devices.
• No special I/O instructions.
• Those addresses are no longer available for memory.

I/O-mapped (isolated) I/O

Ports have a separate address space.

• Special instructions IN and OUT access them.
• A control line (often called IO/M̄) tells the bus whether an address is for memory or I/O.
• The full memory address space stays available for memory.

Buses in one paragraph

A synchronous bus times every transfer with a common clock (fast, simple, short distances). An asynchronous bus uses a handshake: the master raises a request, the slave answers with an acknowledge, and each step waits for the other, so devices of different speeds can share it. When several devices want the bus, bus arbitration decides who gets it: a daisy chain (priority by position) or a central arbiter with separate request lines.

4 · Visual

The CPU sees a device only through its interface's registers (ports).

5 · Worked Examples

Example 1 Easy

Which register would a program read to learn whether a printer is ready?

Solution

The interface's status register.

Example 2 Medium

A 20-bit address space; 16 KB is memory-mapped for I/O. How much memory can be installed and addressed?

Solution

2²⁰ = 1,024 KB; 1,024 − 16 = 1,008 KB.

Example 3 GATE

Which statement about memory-mapped I/O is true? (a) It needs special IN/OUT instructions. (b) Every memory-reference instruction can access device registers. (c) It enlarges the memory address space.

Solution

(b). (a) describes isolated I/O; (c) is backwards: it uses up part of the memory space.

6 · GATE Traps

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• Memory-mapped I/O uses ordinary load/store; isolated I/O needs IN/OUT.
• Memory-mapped I/O costs memory addresses.
• A device is reached through its interface registers, not directly.
• Asynchronous buses use handshaking, not a shared clock.

7 · Memory Hook

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"Mapped into memory = loads and stores; isolated = IN and OUT."

8 · Connect the Dots

Phase 5 finished the CPU's internals; Phase 6 connects it to the outside world. Next: the simplest way to move data through those ports, programmed I/O with polling, and what it costs the CPU.

9 · Self-Test

GATE format. Try every question before opening the vault.

Q1NAT1 markRemaining memory

A 16-bit address space reserves 8 KB for memory-mapped I/O. How many KB remain for memory?

Numerical answer: ________

Q2MCQ1 markIsolated I/O

Isolated (I/O-mapped) I/O requires:

• (A) interrupts
• (B) DMA
• (C) special I/O instructions such as IN and OUT
• (D) device registers to be in the memory address space

Q3MSQ2 marksInterface registers

Which registers does a typical I/O interface provide?

• (A) Control register
• (B) Status register
• (C) Program counter
• (D) Data register

Q4MCQ1 markHandshake

A bus on which each transfer step waits for a request/acknowledge exchange instead of a common clock is:

• (A) synchronous
• (B) multiplexed
• (C) daisy-chained
• (D) asynchronous

Q5NAT1 markPort addresses

An interface has 4 ports. A memory-mapped design places them at consecutive byte addresses from 0xFF00. What is the address of the last port (in decimal)?

Numerical answer: ________

10 · Rule Card

• Interface registers (ports): data, status, control.
• Memory-mapped: ports in memory space, LOAD/STORE, memory space reduced.
• Isolated: separate space, IN/OUT, extra select line.
• Synchronous bus: clock. Asynchronous: handshake. Arbitration: daisy chain or central.

11 · Concept Ledger

Unlocked in this lesson. From here on, these terms may be used.

I/O interface (controller)I/O portdata, status and control registersmemory-mapped I/Oisolated (I/O-mapped) I/OIN/OUT instructionssynchronous busasynchronous bus (handshake)bus arbitrationdaisy chain (preview)

12 · Answer Vault