Arithmetic circuits

ACompressed recap

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Combinational = no memory; design via truth table and K-map; delay = critical path; hazards fixed by consensus terms. Half adder S = A ⊕ B, C = AB; full adder S = A ⊕ B ⊕ Cᵢₙ, Cₒᵤₜ = majority; RCA: Cₙ at n·t_c, last sum at (n − 1)t_c + t_s. CLA: G = AB, P = A ⊕ B, Cᵢ₊₁ = Gᵢ + PᵢCᵢ, 4 gate delays. Adder–subtractor: XOR B with M, C₀ = M.

BMerged rule card

5.1.1 Combinational circuits: analysis, design and propagation delay

• Combinational: outputs depend only on current inputs; sequential circuits remember.
• Design: specification → truth table → K-map → gates (AND–OR or NAND–NAND).
• Circuit delay = largest sum of gate delays along any input-to-output path (critical path).
• Static-1 hazard between adjacent 1s in different groups; fix with the consensus term.

5.1.2 Half adder, full adder and the ripple-carry adder

• Half adder: S = A ⊕ B, C = AB.
• Full adder: S = A ⊕ B ⊕ Cᵢₙ; Cₒᵤₜ = AB + BCᵢₙ + ACᵢₙ = AB + Cᵢₙ(A ⊕ B); = 2 half adders + OR.
• n-bit RCA: Cₙ at n·t_c; Sₙ₋₁ at (n − 1)·t_c + t_s; delay linear in n.

5.1.3 Carry-lookahead adder, adder–subtractor and comparators

• Gᵢ = AᵢBᵢ, Pᵢ = Aᵢ ⊕ Bᵢ, Cᵢ₊₁ = Gᵢ + PᵢCᵢ, Sᵢ = Pᵢ ⊕ Cᵢ.
• Unrolled Cᵢ: i AND gates + one (i + 1)-input OR. CLA delay: 1 (P, G) + 2 (carries) + 1 (sums) = 4.
• Rippled 4-bit CLA blocks: 2 gate delays per block for the carry.
• Adder–subtractor: Bᵢ ⊕ M, C₀ = M. Equality: AND of XNORs; magnitude: decide at the highest differing bit.

CInterleaved GATE-style questions

Q1NAT1 markDelay

A two-level AND–OR circuit uses AND gates of 3 ns and OR gates of 4 ns; inputs and their complements are available. Circuit delay in ns?

Numerical answer: ________

Q2MCQ1 markCombinational

Which of these is NOT a combinational circuit?

• (A) Counter
• (B) Multiplexer
• (C) Comparator
• (D) Full adder

Q3NAT1 markFull adder

How many of the 8 input combinations of a full adder give S = 1?

Numerical answer: ________

Q4NAT2 marksRCA

A 32-bit ripple-carry adder: carry delay 1 ns, sum delay 2 ns. When is S₃₁ valid (ns)?

Numerical answer: ________

Q5MCQ1 markFull adder

The carry out of a full adder with inputs A, B, Cᵢₙ can be written:

• (A) ABCᵢₙ
• (B) A ⊕ B ⊕ Cᵢₙ
• (C) AB + Cᵢₙ(A ⊕ B)
• (D) (A + B)Cᵢₙ

Q6NAT2 marksCLA

In a 4-bit carry-lookahead adder built as in the lesson, how many inputs does the OR gate for C₄ have?

Numerical answer: ________

Q7MCQ2 marksAdder–subtractor

A 4-bit adder–subtractor with M = 1 is given A = 0010 and B = 0101. The 4-bit result is:

• (A) 0111
• (B) 1011
• (C) 1101
• (D) 0011

Q8MCQ1 markComparator

Two 4-bit numbers are equal exactly when:

• (A) the sum is 0
• (B) A + B = 1111
• (C) every pair has XOR = 1
• (D) every pair Aᵢ, Bᵢ has XNOR = 1

DAnswer Vault