CS Atlas GATE 2027
Digital Logic course
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Digital Logic/Phase 7 · Integration & Final Testrule sheet · 3 practice sets · drill · final test

Final test 7.4.1 · Item 56 of 57

Final end-to-end test

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Thirty questions in GATE format covering all phases (15 one-mark, 15 two-mark; 45 marks). Set a 90-minute timer, work on paper, and enter your answers in the boxes. For MSQ tick all correct options; for NAT enter a number. Then press Submit answers: the page scores you with GATE negative marking, shows topic-wise accuracy, lists the questions you got wrong and the lessons to re-read. The full key is at the very end of these notes.

Conventions: 2's complement for signed numbers; IEEE 754 single precision for floating point; first variable is the MSB in minterm numbers; flip-flops positive-edge-triggered; NAT decimals are accepted in a small range.

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30 questions · 45 marks · 90 minutes. Negative marking on MCQ only: −1/3 mark for a wrong 1-mark MCQ, −2/3 for a wrong 2-mark MCQ. No negative marking for MSQ or NAT; MSQ has no partial credit.

Q1NAT1 markBits

Minimum number of bits to represent the unsigned number 2000?

Your answer:

Q2NAT1 markBases

What is 3F₁₆ + 21₈, in decimal?

Your answer:

Q3NAT1 mark2's complement

What value does the 8-bit 2's-complement pattern 1100 1000 represent?

Your answer:

Q4MCQ1 markOverflow

In 2's-complement addition, overflow happens exactly when:

  • (A) the operands have different signs
  • (B) the carry into the MSB differs from the carry out of the MSB
  • (C) the result is negative
  • (D) there is a carry out of the MSB

Q5MCQ1 markBCD

The BCD code of 93 is:

  • (A) 1001 0011
  • (B) 1001 0110
  • (C) 1100 0110
  • (D) 0101 1101

Q6NAT1 markIEEE

What is the exponent field (decimal) of 2.0 in single precision?

Your answer:

Q7MCQ1 markDenormals

In single precision, exponent field 0 with a non-zero fraction represents:

  • (A) zero
  • (B) infinity
  • (C) NaN
  • (D) a denormal number

Q8MCQ1 markGates

Which 2-input gate outputs 0 only when both inputs are 1?

  • (A) AND
  • (B) NAND
  • (C) NOR
  • (D) XNOR

Q9MCQ1 markLaws

A + A'B equals:

  • (A) A
  • (B) AB
  • (C) A + B
  • (D) B

Q10NAT1 markMinterms

In a 5-variable function, how many minterms does the term A'C cover?

Your answer:

Q11NAT1 markNOR

Minimum number of 2-input NOR gates needed for a 2-input AND?

Your answer:

Q12MCQ1 markK-map

In a 4-variable K-map, which group of 4 cells is valid?

  • (A) 0, 2, 8, 10
  • (B) 3, 6, 9, 12
  • (C) 0, 1, 2, 4
  • (D) 1, 2, 5, 6

Q13MCQ1 markTabular method

Which two terms can be merged in the Quine–McCluskey method?

  • (A) 1001 and 0110
  • (B) 1-1- and 1--1
  • (C) 10-1 and 1-01
  • (D) 10-1 and 11-1

Q14NAT1 markDecoder

How many outputs does a 6-to-64 decoder activate for one input code?

Your answer:

Q15NAT1 markJohnson

How many states does a 6-flip-flop Johnson counter cycle through?

Your answer:

Q16NAT2 marksFind the base

235_b = 124 (decimal). What is b?

Your answer:

Q17NAT2 marksBooth

How many additions plus subtractions does Booth's algorithm perform for the multiplier 1100 1100?

Your answer:

Q18NAT2 marksIEEE

What value does the single-precision pattern 0x41A4 0000 represent?

Your answer:

Q19NAT2 marksCustom float

A format has 1 sign bit, 3 exponent bits (bias 3) and 4 fraction bits with IEEE rules. What is its largest finite value?

Your answer:

Q20MCQ2 marksSimplification

(A + B)(A' + C)(B + C) equals:

  • (A) A + B + C
  • (B) (A + B)(A' + C)
  • (C) (A + B)(B + C)
  • (D) AC + B

Q21NAT2 marksCounting

How many Boolean functions of 4 variables satisfy F(0, 0, 0, 0) = 0 and F(1, 1, 1, 1) = 1?

Your answer:

Q22NAT2 marksK-map

F(A, B, C, D) = Σm(3, 4, 5, 7, 9, 13, 14, 15). How many literals are in the minimal SOP?

Your answer:

Q23NAT2 marksEssential PIs

F(A, B, C, D) = Σm(0, 1, 5, 7, 8, 9, 10, 14, 15). How many essential prime implicants does it have?

Your answer:

Q24NAT2 marksDon't-cares

F(A, B, C, D) = Σm(2, 6, 7, 8, 9, 13) + d(0, 10, 15). How many literals are in the minimal SOP?

Your answer:

Q25NAT2 marksRipple adder

A 32-bit ripple-carry adder: carry delay 2 ns, sum delay 3 ns per full adder. When is S₃₁ valid (ns)?

Your answer:

Q26MCQ2 marksMultiplexer

A 2:1 MUX has select A, I₀ = B ⊕ C and I₁ = (B ⊕ C)'. Its output is:

  • (A) A(B ⊕ C)
  • (B) (A ⊕ B ⊕ C)'
  • (C) A ⊕ B ⊕ C
  • (D) B ⊕ C

Q27NAT2 marksClock

t_pd = 5 ns, logic delay 15 ns, setup 5 ns. Maximum clock frequency in MHz?

Your answer:

Q28NAT2 marksRipple counter

A 4 MHz clock drives a 6-bit ripple counter. Frequency of the last output, in kHz?

Your answer:

Q29MCQ2 marksSynchronous counter

A 2-bit counter uses JK flip-flops with J₁ = K₁ = Q₀, J₀ = Q₁', K₀ = Q₁. Starting at 00, its sequence is:

  • (A) 00, 10, 01, 00
  • (B) 00, 01, 11, 00
  • (C) 00, 01, 10, 11, 00
  • (D) 00, 11, 00

Q30NAT2 marksDetector

The overlapping Mealy detector for 101 receives 1 0 1 1 0 1 0 1 0 1. How many 1s does it output?

Your answer:

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