CS Atlas GATE 2027
Digital Logic course
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Digital Logic/Phase 7 · Integration & Final Testrule sheet · 3 practice sets · drill · final test

Revision 7.2.2 · Item 53 of 57

7.2.2 — Mixed practice set 2

Read at your own pace. Try the questions before opening the answers.

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Twelve more mixed questions. Before computing, name the lesson each one comes from.

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12 questions · 20 marks · 40 minutes. Negative marking on MCQ only: −1/3 mark for a wrong 1-mark MCQ, −2/3 for a wrong 2-mark MCQ. No negative marking for MSQ or NAT; MSQ has no partial credit.

Q1MCQ1 markOctal to hex

7456₈ in hexadecimal is:

  • (A) F2E
  • (B) 7456
  • (C) 3CE
  • (D) E2F

Q2NAT1 markRange

What is the largest value of a 10-bit 2's-complement number?

Numerical answer: ________

Q3NAT2 marksBooth

How many additions plus subtractions does Booth's algorithm perform for the multiplier 0110 1101?

Numerical answer: ________

Q4NAT1 markGray code

The Gray code 1101 is converted to binary. What decimal value results?

Numerical answer: ________

Q5NAT2 marksFixed point

Signed (2's-complement) fixed point with 3 integer bits (including the sign) and 5 fraction bits. Most negative value?

Numerical answer: ________

Q6NAT2 marksIEEE decode

What value does the single-precision pattern 0xC110 0000 represent?

Numerical answer: ________

Q7MCQ1 markDuality

The dual of A(B + C) = AB + AC is:

  • (A) A(BC) = (AB)(AC)
  • (B) A + B + C = AB + AC
  • (C) A'(B' + C') = A'B' + A'C'
  • (D) A + BC = (A + B)(A + C)

Q8NAT2 marksCounting

How many Boolean functions of 3 variables have exactly 2 minterms?

Numerical answer: ________

Q9NAT2 marksDon't-cares

F(A, B, C, D) = Σm(4, 8, 10, 11, 12, 15) + d(9, 14). How many literals are in its minimal SOP?

Numerical answer: ________

Q10NAT2 marksTabular method

F(A, B, C, D) = Σm(1, 4, 6, 7, 9, 12, 14, 15). How many prime implicants does the tabular method find?

Numerical answer: ________

Q11NAT2 marksLookahead

An 8-bit adder is two 4-bit carry-lookahead blocks connected in a ripple. P and G take 1 gate delay; a block's carry-out comes 2 gate delays after its carry-in. After how many gate delays is C₈ ready?

Numerical answer: ________

Q12NAT2 marksClock

t_pd = 3 ns, worst logic delay 9 ns, setup 2 ns, clock skew 1 ns. Maximum clock frequency in MHz (2 decimals)?

Numerical answer: ________

✓Answer Vault

Answer Vault

Try the questions first. Open when you are ready to check.

Q1 Answer: (A)1 mark

111 100 101 110 → 1111 0010 1110.

  • (B) is wrong: Unchanged digits.
  • (C) is wrong: Wrong grouping.
  • (D) is wrong: Reversed.

Re-read: Lesson 0.1.2 — Octal, hexadecimal and converting between any two bases

Q2 Answer: 5111 mark

2⁹ − 1.

Re-read: Lesson 1.1.1 — Sign-magnitude, 1's complement and 2's complement

Q3 Answer: 62 marks

Digits +1 0 −1 +1 0 −1 +1 −1.

Re-read: Lesson 1.1.3 — Shifts, multiplication and Booth's algorithm

Q4 Answer: 91 mark

1, 1⊕1 = 0, 0⊕0 = 0, 0⊕1 = 1 → 1001.

Re-read: Lesson 1.2.1 — Binary codes: BCD, excess-3, Gray code and parity

Q5 Answer: -42 marks

−2².

Re-read: Lesson 2.1.1 — Fixed-point binary fractions: range, precision and rounding

Q6 Answer: -92 marks

S 1, E 130 → e = 3; 1.001₂ × 2³.

Re-read: Lesson 2.1.2 — Floating point and IEEE 754: sign, biased exponent, mantissa

Q7 Answer: (D)1 mark

Swap + and ·.

  • (A) is wrong: Not a dual.
  • (B) is wrong: Not a dual.
  • (C) is wrong: Complements the variables.

Re-read: Lesson 3.1.2 — Boolean algebra: laws, duality, De Morgan and algebraic simplification

Q8 Answer: 282 marks

C(8, 2).

Re-read: Lesson 3.2.3 — Counting Boolean functions; self-dual functions; XOR tricks

Q9 Answer: 72 marks

AC + AB' + BC'D' (or AC + AD' + BC'D').

Re-read: Lesson 4.1.3 — Don't-care conditions and 5-variable maps

Q10 Answer: 32 marks

B'C'D, BD', BC.

Re-read: Lesson 4.2.1 — The Quine–McCluskey tabular method

Q11 Answer: 52 marks

3 for C₄, 5 for C₈.

Re-read: Lesson 5.1.3 — Carry-lookahead adder, adder–subtractor and comparators

Q12 Answer: 66.66 to 66.672 marks

Period 15 ns.

Re-read: Lesson 6.1.3 — Converting flip-flops; timing and the maximum clock frequency

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